W9412G6IH-5【PDF 24/53 页】IC DDR-400 SDRAM 128MB 66TSSOPII

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W9412G6IH

9.3

Capacitance

(V DD = V DDQ = 2.5V ± 0.2V, f = 1 MHz, T A = 25 ° C, V OUT (DC) = V DDQ /2, V OUT (Peak to Peak) = 0.2V)

SYMBOL

C IN

C CLK

C I/O

C NC

PARAMETER

Input Capacitance (except for CLK pins)

Input Capacitance (CLK pins)

DQ, DQS, DM Capacitance

NC Pin Capacitance

MIN.

2.0

3.0

1.5

-

MAX.

4.0

5.0

5.5

1.5

DELTA

(MAX.)

0.5

0.25

0.5

-

UNIT

pF

pF

pF

pF

Notes: These parameters are periodically sampled and not 100% tested.

The NC pins have additional capacitance for adjustment of the adjacent pin capacitance.

9.4

Leakage and Output Buffer Characteristics

SYMBOL

I I (L)

I O (L)

V OH

PARAMETER

Input Leakage Current

(0V < V IN < V DDQ , All other pins not under test = 0V)

Output Leakage Current

(Output disabled, 0V < V OUT < V DDQ )

Output High Voltage

(under AC test load condition)

MIN.

-2

-5

V TT +0.76

MAX.

2

5

-

UNIT

μA

μA

V

NOTES

V OL

Output Low Voltage

(under AC test load condition)

100%

Strength

-

V TT -0.76

V

I OH (DC)

I OL (DC)

Output Minimum Source DC Current

Output Minimum Sink DC Current

-15.2

15.2

-

-

mA

mA

4, 6

4, 6

I OH (DC)

I OL (DC)

I OH (DC)

I OL (DC)

Output Minimum Source DC Current

Output Minimum Sink DC Current

Output Minimum Source DC Current

Output Minimum Sink DC Current

60%

Strength

30%

Strength

-10.4

10.4

-7.2

7.2

-

-

-

mA

mA

mA

mA

5

5

5

5

Publication Release Date: Sep. 16, 2009

- 24 -

Revision A06

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